Pin usage

Pin usage

The address bus had its own 16 pins, and the data bus had 8 pins that were possible to use without any multiplexing. Using the two additional pins (read and write signals), it was possible to assemble simple microprocessor devices very easily. Only the separate IO space, interrupts and DMA required additional chips to decode the processor pin signals. However the processor load capacity was limited, and even simple computers frequently contained bus amplifiers.

The processor required three power sources (-5, +5 and +12 Volt(V)) and two non-interlacing high-amplitude synchronization signals. However at least the late Soviet version КР580ВМ80А was able to work with a single +5 V power source, the +12 V pin being connected to +5 V and the -5 V pin to ground. The processor consumed about 1.3 watts (W) of power.

The pinout table, from the chip's accompanying documentation, described the pins as follows:
Pin number Signal Type Comment
1 A10 Output Address bus 10
2 GND - Ground
3 D4 Bidirectional Bidirectional data bus. The processor also transiently sets here the "processor state", providing information about what the processor is currently doing:

* D0 reading interrupt command. In response to the interrupt signal, the processor was reading and executing a single arbitrary command with this flag raised. Normally the supporting chips provided the subroutine call command (CALL or RST), transferring control to the interrupt handling code.
* D1 reading (low level means writing)
* D2 accessing stack (probably a separate stack memory space was initially planned)
* D3 doing nothing, has been halted by the HLT command
* D4 writing data to an output port
* D5 reading the first byte of an executable command
* D6 reading data from an input port
* D7 reading data from memory

4 D5
5 D6
6 D7
7 D3
8 D2
9 D1
10 D0
11 -5 V - The -5 V power supply. This must be the first power source connected and the last disconnected, otherwise the processor will be damaged.
12 R Input Reset. The signal forces execution of commands, located at address 0000. The content of other processor registers is not modified. This is an inverting input (the active level being logical 0)
13 DMA Input Direct memory access request. The processor is requested to switch the data and address bus to the high impedance ("disconnected") state.
14 INT Input Interrupt request
15 CLC2 Input The second phase of the clock generator signal
16 ACK INT Output The processor had two commands for setting 0 or 1 level on this pin. The pin normally was supposed to be used for interrupt control. However in simple computers it was sometimes used as a single bit output port for various purposes.
17 RD Output Read (the processor reads from memory or input port)
18 WR Output Write (the processor writes to memory or output port). This is an inverted output, the active level being logical zero.
19 S Output Active level indicates that the processor has put the "state word" on the data bus. The various bits of this state word provide additional information for supporting the separate address and memory spaces, interrupts, and direct memory access. This signal is required to pass through additional logic before it can be used to write the processor state word from the data bus into some external register.
20 5 V - The + 5 V power supply
21 ACK DMA Output Direct memory access confirmation. The processor switches data and address pins into the high impedance state, allowing another device to manipulate the bus
22 CLC1 Input The first phase of the clock generator signal
23 RDY Input Wait. With this signal it was possible to suspend the processor's work. It was also used to support the hardware-based step-by step debugging mode.
24 WAIT Output Wait (indicates that the processor is in the waiting state)
25 A0 Output Address bus
26 A1
27 A2
28 12 V - The +12 V power supply. This must be the last connected and first disconnected power source.
29 A3 Output The address bus, can switch into high impedance state on demand
30 A4
31 A5
32 A6
33 A7
34 A8
35 A9
36 A15
37 A12
38 A13
39 A14
40 A11