Models

Models

There are several suffixes and variants including:

* i486DX — The original chip (without any clock doubling).
* i486DX-S — SL Enhanced 486DX
* i486DXL — A 486DX with SMM (System Management Mode), stop clock, and power saving features.
* i486SX — an i486DX with the FPU part disabled or missing. Early variants were parts with disabled (defective[citation needed]) FPUs, later versions had the FPU removed from the die to reduce area and hence cost.
* i486SX-S — SL Enhanced 486SX
* i486SXL — A 486SX with SMM (System Management Mode), stop clock, and power saving features.
* i486DX2 — the internal processor clock runs at twice the clock rate of the external bus clock.
* i486SX2 — i486DX2 with the FPU disabled.
* i486SL — low power version of the i486DX, reduced VCore, power conservation circuitry - mainly for use in portable computers.
* i486SL-NM — i486SL based on i486SX
* i487SX — i486DX with a slightly different pinout sold as an FPU upgrade to i486SX systems; it was widely documented that an i487SX when installed completely disabled the existing i486SX on the motherboard, replacing it.
* i486 OverDrive — i486SX, i486SX2, i486DX2 or i486DX4. Marked as upgrade processors, some models had different pinouts or voltage handling abilities from 'standard' chips of the same speed stepping. Fitted to a coprocessor or "OverDrive" socket on the motherboard, worked the same as the i487SX.
* i486DX4 — designed to run at triple clock rate (not quadruple as often believed; the DX3, which was meant to run at 2.5x the clock speed, was never released). DX4 models that featured write-back cache were identified by an "&EW" laser etched into their top surface, while the write-through models were identified by "&E".

Model Specified max clock Voltage L1-Cache Introduced
i486DX (P4) 20,25,33 MHz; 50 MHz 5V 8 KB WT April 1989; April 1989; May 1990; June 1991
i486SL 20,25,33 MHz 5V or 3.3V 8 KB WT Nov 1992
i486DXL ? ? 8 KB WT ?
i486SX (P23) 16,20,25 MHz (33 MHz) 5V 8 KB WT September 1991 (September 1992)
i486DX2 (P24) 40/20, 50/25 MHz (66/33 MHz) 5V 8 KB WT March 1992 (August 1992)
i486DX-S (P4S) 33 MHz; 50 MHz 5V or 3.3V 8 KB WT June 1993
i486DX2-S (P24S) 40/20, 50/25 MHz (66/33 MHz) 5V or 3.3V 8 KB WT June 1993
i486SX-S (P23S) 25,33 MHz 5V or 3.3V 8 KB WT June 1993
i486SXL ? ? 8 KB WT ?
i486SX2 50/25, 66/33 MHz 5V 8 KB WT March 1994
IntelDX4 (P24C) 75/25, 100/33 MHz 3.3V 16 KB WT March 1994
IntelDX4WB 100/33 MHz 3.3V 16 KB WB October 1994
i486DX2WB (P24D) 50/25, 66/33 MHz 5V 8 KB WB October 1994
i486DX2 (P24LM) 30/90 MHz; 33/100 MHz 2.5-2.9V 8 KB WT 1994

WT = Write-Through cache strategy, WB = Write-Back cache strategy

The specified maximum internal clock frequency (on Intels versions) ranged from 16 to 100 MHz. The 16 MHz i486SX model was used by Dell Computers but sometimes ridiculed for the fact that it was handily beaten by many 386 systems. One of the few 486 models specified for a 50 MHz bus (486DX-50) initially had overheating problems and was moved to the 0.8 micrometre fabrication process. However, problems continued when installed in local bus systems due to the high bus speed, making it rather unpopular with mainstream consumers as local bus video was considered a requirement at the time. It was soon eclipsed by the clock-doubled i486DX2 which instead ran the CPU logic at twice the external bus speed. However, the 486DX-50 remained popular with users of EISA systems. More powerful 486 iterations such as the OverDrive and DX4 were less popular (the latter available as an OEM part only), as they came out after Intel had released the next generation Pentium. Certain steppings of the DX4 also officially supported 50 MHz bus operation but was a seldom used feature.