Core specifications

Core specifications

Desktop
A Pentium II Klamath backside with its plastic casing removed, showing the commodity L2 cache chips and the cache controller (center).
A Pentium II Deschutes. CPU Core in the middle, cache on the right

Klamath (80522)

* L1 cache: 16 + 16 KiB (Data + Instructions)
* L2 cache: 512 KiB, as external chips on the CPU module clocked at half the CPU frequency.
* Packaging: Slot 1 module
* MMX
* Front side bus: 66 MHz, GTL+
* VCore: 2.8 V
* Process: 0.35 µm CMOS
* First release: May 7, 1997
* Clockrate: 233, 266, 300 MHz

Deschutes (80523)

* L1 cache: 16 + 16 KiB (Data + Instructions)
* L2 cache: 512 KiB, as external chips on the CPU module clocked at half the CPU frequency.
* Packaging: Slot 1 module
* MMX
* Front side bus: 66, 100 MHz, GTL+
* VCore: 2.0 V
* Process: 0.25 µm CMOS
* First release: January 26, 1998
* Clockrate: 266 - 450 MHz
o 66 MHz FSB : 266, 300, 333 MHz
o 100 MHz FSB: 350, 400, 450 MHz

Mobile

Tonga (80523)
Mobile Pentium II (Tonga).

Mobile Pentium II

* L1 cache: 16 + 16 KiB (Data + Instructions)
* L2 cache: 512 KiB, as external chips on the CPU module clocked at half the CPU frequency.
* Package: MMC-1, MMC-2, Mini-Cartridge
* MMX
* Front side bus: 66 MHz, GTL+
* VCore: 1.6 V
* Process: 0.25 µm CMOS
* First release: June 7, 1997
* Clockrate: 233, 266, 300 MHz

Dixon (80524)
Mobile Intel Pentium II (Dixon) 400 MHz.

Mobile Pentium II PE ("Performance Enhanced")

* L1 cache: 16 + 16 KiB (Data + Instructions)
* L2 cache: 256 KiB, on-die, full speed.
* Package: BGA1, MMC-1, MMC-2, μPGA1
* MMX
* Front side bus: 66, 100 MHz, GTL+
* VCore: 1.5, 1.55, 1.6 V, 2.0 V
* Process: 0.25 µm CMOS
* First release: January 25, 1999
* Clockrate: 266 - 400 MHz

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