8085 microarchitecture.

CPU architecture
i8085 microarchitecture.

The 8085 Architecture follows the von Neumann architecture, with a 16-bit address bus, and a 8-bit data bus. The 8085 incorporated all the features of the 8224 (clock generator) and the 8228 (system controller), increasing the level of system integration. The 8085 along with an 8156 RAM and 8355/8755 ROM/PROM constituted a complete system. The 8085 used a multiplexed Data Bus and required the 825X-5 support chips. The address was split between the 8-bit address bus and 8-bit data bus. The on-chip address latch of 8155/8355/8755 memory chips allowed a direct interface with the 8085. The processor was designed using NMOS circuitry and the later "H" versions were implemented in Intel's enhanced NMOS process called HMOS, originally developed for fast static RAM products. The 8085 used 6,500 transistors.